Appeal No. 96-0908
Application 08/160,118
pixels in register 52 and currently stored pixels in
register 54 produces one bit in the result (mask) register 56
(which can also be called a status register or flag register).
Figure 4 shows a 32-bit field size which produces the two
leftmost result bits in register 56 which are used in the
merge operation in figure 5. Figure 6 shows an 8-bit field
size which produces eight result bits. One of ordinary skill
would have appreciated from these two examples that the field
size can be the width of the whole register where the
comparison produces one status bit. Moreover, the claim
language, as broadly interpreted, does not distinguish over
Diefendorff. Claim 1 recites "data registers, each storing a
predetermined number of data bits." The "predetermined number
of data bits" does not have to be the total number of bits in
the register, but could be, for example, the 32-bit field in
figure 3. Thus, this argument of appellants is not
persuasive.
Appellants argue in the Auslander rejection (Br5):
"Second, Diefendorff et al teaches storing the resultant of
his pixel merge instruction in a register in general register
file 34 and not at an addressed location within memory as
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