Appeal No. 96-0908
Application 08/160,118
by the load/store units 25 may directly use the mask value to
independently enable the transfer of each byte in the result
operand from the register file 34 to memory 50." Thus,
Diefendorff discloses a conditional store to memory of the
result operand based on the mask (status) value, which implies
that the bytes are taken from registers 57, 58 in the general
register file 34 rather than being stored first in register 59
in the register file 34. Even if the result operand were
stored first in register 59 in the general register file 34,
then stored to memory, claim 1 does not exclude an
intermediate storage as part of the action produced by the
CONDITIONAL-STORE instruction. Diefendorff alone is
sufficient to establish a prima facie case of obviousness.
Appellants argue (Br5): "First, a single selected status
bit controls the storage of all of the bits of the registers.
This recitation is not shown in Auslander et al. Diefendorff
et al shows plural status bits control whether differing parts
of registers 57 and 58 are stored in register 59." We do not
find a comparable argument for the Kawata rejection.
Diefendorff operates on multiple fields within the 64-bit
registers. Each field comparison between Z-values for new
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