Appeal No. 96-4033
Application No. 08/086,354
disclosed in Lee at col. 1, lines 8-11, col. 3, lines 5-11, col.
4, lines 64-68, col. 5, lines 1-20 and the claims. In item (12),
the examiner asserts that Lee does not specifically detail the
fourth and last element of claim 11 recited as means for testing a
register defined in a branch instruction after fetching for the
next instruction has started. In connection therewith, it is
asserted to the effect that it was well-known in the art that in a
pipeline system, while one instruction is being fetched, the
instruction just prior to said one instruction is being executed,
and the result of the execution of a third instruction in the
pipeline just prior to the second instruction is being saved. At
the top of page 4 of the answer, the contention is made that it
was known to test a register defined for storing executed
instruction results in instruction processing systems, and at page
5, the examiner takes the position that testing a register defined
by the branch is nothing more than comparing the contents of the
registers defined by the opcode field, which is taught by Lee at
col. 1, lines 46-55. Lastly, the examiner contends the background
art discussed by Lee discloses testing a register defined by the
branch instruction to determine a condition defined by the opcode.
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