Appeal No. 96-4033
Application No. 08/086,354
determine a condition specified by the opcode, but argue that the
disclosure in Lee at column 1, lines 39-55, relied on by the
examiner, does not teach means for testing the register after the
means for fetching has started fetching the next instruction or
the branch target instruction.
We do not find a clear teaching of comparing the
contents of registers defined by the opcode field in col. 1, lines
39-55, of Lee, and the examiner has not explained how one would
extrapolate such a teaching from this specific disclosure.
Nevertheless, at column 1, lines 63 to column 2, line 9, Lee
discloses that some prior art architectures have fetched both the
instruction in the program following the branch instruction and
the instruction at the branch target address together. In such a
system, when a register identified in the branch instruction is
tested or sampled to determine the condition specified by the
operations code for execution of the branch instruction, that step
can only be performed at the same time or after fetching of the
instruction after the branch instruction has started or the
fetching of the branch target instruction has started. Because 35
U.S.C.
8
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