Appeal No. 1997-0300
Application 08/138,790
through 63 of the specification, Appellants describe how the
write buffer is used in performing misaligned writes.
Appellants describe a misaligned write on page 59 of the
speci- fication as a write where the data written to memory
will overlap the memory’s eight byte boundary for a particular
memory address.
Accordingly, a second write is needed for the additional
infor- mation. Appellants identify on pages 59 and 60 of the
specifi- cation that there is a control logic which determines
if the write operation will exceed the eight byte boundary.
If the operation will exceed the eight byte boundary, a second
entry to the write buffer will be made and this second entry
will be loaded with the address for the memory location where
the data which carries over the eight byte boundary is to be
written.
Independent claim 11 is illustrative of the
invention.
11. A microprocessor having a data path of
predetermined length that defines a memory block boundary,
comprising:
3
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