Appeal No. 1997-0300
Application 08/138,790
This is illustrated in Table XII and Table XIII in columns 17
and 18. We find that Table XII shows that the first write
enters bytes A through D in one physical memory location, and
the second write
stores bytes E through G in the second location. As stated
above, we find that Ardini teaches that using the buffer
allows writes to contiguous memory locations to be merged into
one write to one memory location. Thus, Ardini's system, when
presented with the writes shown in Shimp’s Table XII, would
not make a misaligned write. Rather, the data would be
written as one seven bit write to one memory location. Thus,
we find that Ardini does not suggest the desirability to add a
write buffer to Shimp’s system which writes across memory
boundary. Accordingly, we will not sustain the rejection
under 35 U.S.C. § 103 as being unpatentable over Shimp and
Ardini.
For the foregoing reasons, we reverse the rejection
of claims 11 to 24 under 35 U.S.C. § 103.
REVERSED
12
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