Appeal No. 1997-0300
Application 08/138,790
block boundary, the write buffer has two entries, the first
containing the beginning address in memory for the data
storage and the second being the memory address for the
continuing data. These limitations are found in the claim 11,
a "core means for executing a plurality of write
instructions," and a
write buffer means having a plurality of
entries, coupled to the core means and
the misalignment control means, for
temporarily storing the plurality of write
operands and responsive to the misalignment
control means indicating a misaligned write
operand, for allocating a first and a
second write buffer entry, wherein the
address field of the first write buffer
entry contains a beginning address in a
first memory block for the misaligned write
operand and the address field of the second
write buffer entry contains a continuation
address in a second memory block for the
misaligned operand.
Claim 16 contains similar limitations of a “core for
executing . . .” and “a write buffer . . . .” Claim 21 con-
tains similar limitations of “ a core . . . a write buffer”
and the step of “allocating a first and a second write buffer
entry . . . .” In summary, we find that the scope of the
independent claims is such that if a write from the core to
8
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