Ex parte GARIBAY et al. - Page 7

          Appeal No. 1997-0300                                                        
          Application 08/138,790                                                      

          “unaligned” writes are “completely different from ‘misaligned’              
          writes and therefore there is no incentive to look to Shimp.”               
          Further, Appellants point out that Ardini does not address a                
          write across a 64 bit word boundary as Appellants claim.                    
                    On page 2 of the Examiner’s answer (answer), the                  
          Examiner asserts that the combination of Shimp and Ardini                   
          teach the claimed write buffer as “the two write accesses                   
          generated by Shimp et al.’s system will cause Ardini Jr. et                 
          al.’s system to allocate two write buffer entries, with each                
          containing the address of that memory word to which the data                
          in that buffer entry is destined.”  On page 3 of the answer,                
          the Examiner asserts that Ardini provides the motivation of                 
          enhanced performance by buffering of memory writes.                         
                    First, we must determine the scope of the claims.                 
          We find that the scope of the independent claims includes a                 
          microprocessor which writes data to memory through a write                  
          buffer which temporarily stores the data.  Further, the scope               
          includes that when there is a misalignment between the data                 
          and the memory                                                              


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