Appeal No. 1997-2247 Page 13
Application No. 08/259,798
bit lines precharged high ...."). Precharging to the high
logic state necessarily requires precharging to a high logic
precharging voltage. We are persuaded that these teachings
would have suggested ipso facto the limitations of "a
plurality of complementary pairs of bitlines ...; a precharge
circuit for simultaneously precharging both leads of each of
the plurality of pairs of bitlines to a common precharge
voltage ..." as well as "a plurality of complementary pairs of
bitlines ...; and a circuit arranged for simultaneously
precharging both leads of each of the plurality of pairs of
bitlines to a common precharge voltage ...."
Second, the appellant argues, "Kuo et al. has no
teachings or suggestions of supplying an alternative voltage
to both bitlines of each complementary pair. Kuo et al.
expressly teaches not writing any value to its complementary
bit line." (Appeal Br. at 4.)
Claim 10 specifies in pertinent part the following
limitations:
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