Appeal No. 1997-2247 Page 15
Application No. 08/259,798
of precharging bit lines BL and BL* to high or low logic
states." Col. 5, ll. 24-26. Precharging to the low logic
state necessarily requires disabling the high logic
precharging voltage and supplying an alternative low logic
voltage.
We are persuaded that these teachings would have
suggested the limitations of "a precharge disabling circuit,
responsive to a control signal, for disabling the precharge
circuit from applying the common precharge voltage and for
concurrently supplying an alternative common voltage to both
leads of each of the plurality of pairs of bitlines" and "a
circuit arranged for simultaneously precharging both leads of
each of the plurality of pairs of bitlines to a common
precharge voltage and, in response to a control signal,
supplying concurrently an alternative common voltage to both
leads of each of the plurality of pairs of bitlines."
Therefore, we affirm the rejection of claims 10 and 11 as
obvious over Kuo. Our affirmance is based only on the
arguments made in the briefs. Arguments not made therein are
not before us, are not at issue, and are considered waived.
Page: Previous 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Next
Last modified: November 3, 2007