Appeal No. 1997-3911
Application 08/368,758
requiring replacement of the ROM (col. 1, lines 63-68).
Referring to Figure 1, Patrick employs a program patching
module 16 which is connectable to but is not part of the
microcomputer chip 10. This module includes a patch control
memory 44 having one bit for each memory address in the on-
chip ROM program store 17; the bit in memory 44 associated
with each address of the ROM 17 is set to a 1 or 0 depending
upon whether or not a patch is to be implemented beginning at
the next address (col. 5, lines 12-16). Patch memory 40 is a
programmable memory (PROM) containing instruction words to
supplement or replace instructions stored in the ROM 17 (col.
4, lines 45-49; col. 6, lines 10-13). Patch control memory 44
is described as "a standard 'X1' memory commercially available
at low cost" (col. 5, lines 62-64). Furthermore, in its
"simplest embodiment" memory 44 is a PROM or EPROM (col. 6,
lines 3-7). Alternatively, memory 44
may be a static RAM, in which case the patch point
bits are set by a start-up routine when the system
is reset or initiallized [sic]. This routine may be
programmed into the PROM 40 and accessed as part of
the reset procedure originally coded in ROM 17.
This coded data from the PROM 40 in the reset
procedure generates the data to be written into the
RAM 44 by an algorithm (so that excessive space in
the PROM 40 is not used up); write inputs 50 to the
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