Appeal No. 1997-3911
Application 08/368,758
register 6. In response to a substitution indicating signal 9
from address comparing circuit 4, the command select circuit 7
selects the substitute command from substitute command
register 5 in place of the ROM command stored in microcommand
register 6. The output of command select circuit 7 is applied
to command determination control circuit 8.
Figure 2 shows the address comparing circuit 4
implemented as a plurality of registers 41a-41c, address
comparators 42a-42c, and an OR gate 43, and shows the
substitute command register 5 implemented as a plurality of
registers 51a-51c. However, Denki also explains that "[t]he
registered address registers (41a), (41b) and (41c) may be a
RAM or a switch setting system instead of registers.
Similarly, the substitution command registers (51a), (51b) and
(51c) may also be replaced by a RAM or a switch setting
system" (Transl. at 8, lines 1-5). Appellants do not deny
that elements 51a-51c implemented as a RAM constitute "random
access correcting information storage means" in the sense of
claim 14. Instead, they deny that it would have been obvious
to (1) locate the RAM “on the single substrate” or (2) store
the substitute commands therein “upon any initialization of
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