Appeal No. 1997-3979
Application No. 08/586,365
This is an appeal from the final rejection of claims
8-10 and 19, all of appellant's pending claims, under 35
U.S.C.
§§ 102 and 103. We reverse.
A. The invention
The invention relates to an BI-CMOS integrated circuit,
i.e., an integrated circuit which includes bipolar junction
transistors (BJTs), N-channel MOSFETs, and P-channel MOSFETs
(Spec. at 1, lines 3-5).
Referring to Figure 7, a PG base layer which will be part
of a BJT is formed by implanting boron into the N-well region
through a layer of polysilicon and a layer of oxide (Spec. at
5, lines 24-26). The polysilicon scatters the boron atoms,
reducing the channeling effect and thereby producing a PG
layer that is thinner than would be the case if the implanting
were not done in the absence of the polysilicon layer (Spec.
at 5, line 26 to p. 7, line 5). The result is an improvement
in the breakdown voltage of the base-emitter junction and a
concentration of dopant that more closely approaches the step
junction characteristic shown in Figure 12, thereby improving
the speed and reliability of the transistor (Spec. at 7, lines
-2-
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