Appeal No. 1997-3979
Application No. 08/586,365
Figures 7A-7F show the technique being used to produce an MOS
transistor (col. 6, lines 3-6), more particularly to produce
the pG region 31 in Fig. 7D (col. 6, lines 28-35). Figures
8A-8E show the technique being used to produce a bipolar
transistor (col. 6, lines 57-59), more particularly to produce
the p-type base layer indicated as 42 in Fig. 8C (col. 7,
lines 37-44). Figure 10 shows the impurity concentration S
characteristic of a bipolar transistor base layer having a
thickness of 40 nm, which is 400D (col. 7, lines 62-68).
Figure 13B shows the impurity concentration characteristic for
a base layer about 340D thick, formed in the presence of
oxygen (col. 8, lines 37-43). Appellant argues that
[a]lthough Doki does teach how a shallow
junction can be formed on either a FET device
or a bipolar device, these descriptions are
mutually exclusive of one another. There is
simply no teaching or suggestion of forming
such a shallow junction on a semiconductor
device having both bipolar and MOS transistors
(i.e. a BiCMOS device). [Brief at 5.]
That the examiner agrees with appellant that claim 19 calls
for a BiCMOS device is apparent from the following argument:
While it is true that Doki does not
explicitly recite forming both the bipolar
and MOS transistors on the same substrate,
note claim 19 only recites a shallow junction
-5-
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