Appeal No. 1998-0049
Application 08/289,028
This is a decision on appeal under 35 U.S.C. § 134 from
the final rejection of claims 61-63, 65-70, 72, 74-76, 81,
and 88-93.
We affirm-in-part.
BACKGROUND
The disclosed invention relates to an instruction
format for a data processing device, as described in the
specification at page 103, line 26 to page 109, line 18.
The instruction is provided with a field for mask bits for
specifying a particular set of status conditions which are
to be used for a conditional test; the function performed by
the instruction is then determined by the result of the
conditional test. The instruction may have status bits
that, taken together with the mask bits, determine a
conjunction of conditions; see figure 32 and the
accompanying discussion.
Claim 61 is reproduced below.
61. A data processing device comprising:
a circuit having status conditions wherein a
particular set of the status conditions can occur in
operation of the circuit;
an instruction register operative to hold a
predetermined instruction conditional on a particular
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