Appeal No. 1998-0049
Application 08/289,028
treat claims 74 and 81 as standing or falling together with
claim 61.
Obviousness
Claims 61, 62, 65-70, and 89
The Examiner finds that Itomitsu generally teaches the
limitations of the claims, except "Itomitsu did not teach
instruction register including mask bits but Vandierendonck
et al (3,987,416) taught instruction register including mask
bits (figure 5)" (FR3-4; EA6). The Examiner concludes that
it would have been obvious to combine the teachings of
Itomitsu and Vandierendonck "because they were both directed
toward providing circuits for executing conditional
instructions and mask fields of Vandierendonck et al would
improve execution and computation speed of Itomitsu et al"
(FR4; EA6).
The issue is whether Vandierendonck discloses or
suggests the limitations of "mask bits to select any one or
more of the conditions to form said particular set of status
conditions" and "circuitry to perform a predetermined
function in response to the predetermined instruction when
said particular set of the status conditions of said circuit
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