Appeal No. 1998-0069
Application 08/356,946
alternatively in an operational mode and a test mode. There
is no suggestion in Jarwala that the functional signal from
application logic 14 to one of the BSCs 16 in an IC 12
should have a fixed logic value during an operational mode.
Furthermore, the circuit in figure 3 of Jarwala, discussed
at column 4, corresponds to the TDO generator 60 in figure 2
which is part of the controller 22. The circuit supplies
test data to the BSCs in the ICs 12 in figure 1 and is not
part of the functional circuit connection in the ICs to the
BSC; therefore, we fail to see how the Examiner proposes to
modify Shiono in view of this teaching to arrive at the
claimed subject matter.
The Examiner states (EA9): "Examiner takes official
notice of the fact that due to recent advances in integrated
circuit design and integration, Pull [sic] up and pull down
resistors are being provided within integrated circuits thus
providing fixed voltage levels and alleviating the need to
add these on the circuit boards."
Appellants argue that this fact is not appropriate for
official notice, but even if it is, it fails to meet the
limitations of the present claims in which the point is not
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