Ex parte FUTAKUCHI - Page 17




          Appeal No. 2000-0806                                                        
          Application No. 09/016,398                                                  


          desired vias.  In the absence of evidence suggesting why the                
          skilled artisan would have found it obvious to modify the                   
          invention of Dordi, having a PCB with no vias or connection                 
          terminals on its lower surface, to include such vias and                    
          connection terminals, we will not sustain the rejection of                  
          claims 1-11, 13, 21, and 22 under 35 U.S.C. § 103.                          


                    Appellant's claim 23 recites a ball grid array                    
          semiconductor integrated circuit device, including many                     
          limitations very similar to those contained in claim 1: a                   
          semiconductor chip, plurality of conductors, plurality of                   
          external connection terminals, a sealing resin layer                        
          surrounding the chip, a carrier base to which the chip is                   
          mounted, and a reinforcement base.  The notable differences                 
          between claim 1 and claim 23 are that (a) the semiconductor                 
          chip is not mounted centrally between the carrier base and                  
          reinforcement base, and (b) rather than having matching                     
          coefficients of thermal expansion, the two bases have                       
          differences in at least one of modulus of elasticity and                    
          thickness, so that thermal stresses on the two bases in                     
          response to temperature changes are                                         
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