Appeal No. 1999-0485
Application 08/526,781
On page 9 of the brief, Appellant argues that the
rounding processing means of claim 1 selectively rounds the 2n
bit with output from the shifting operation means to n bit
length in accordance with the rounding instruction provided by
the instruction decoding means. Appellant respectively
submits that Toriumi does not disclose or even remotely
suggest these features.
On page 20 of the brief, Appellant argues that claim 6
recites an arithmetic means as providing operation resultant
data of 2n bit length over one of the plurality of outputs.
The selection means selects one of the plurality of outputs on
which the operation resultant data is provided in accordance
with a selection signal provided by the instruction means.
The shifting operation means is recited as having 2n bit width
capacity. The rounding processing means rounds an output of
the shifting operation means to n-bit length in accordance
with the rounding signal provided by the instruction means.
The rounding processing means is further recited as not
5
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