Ex parte KANEKURA - Page 7




          Appeal No. 1999-0485                                                        
          Application 08/526,781                                                      


          Appellant’s claim 25 is directed to a method of performing a                
          combined processing operation on a received data packet which               
          includes digital data and instruction data and includes in                  
          combination steps a) through d).  Appellant points out that                 
          step d) as claimed includes rounding the shift data when the                
          resultant data is provided based on an arithmetic operation                 
          and not rounding the shift data when the resultant data is                  
          provided based on a logical operation.  Appellant argues that               
          Toriumi does not disclose these limitations as recited in                   
          Appellant’s claim 25.                                                       
               We note that Appellant’s claim 1 recites                               
               rounding processing means, coupled to receive an output                
               value of said shifting operation means, for rounding the               
               output value of said shifting operation means to n-bit                 
               length in accordance with a rounding instruction provided              
               by said instruction decoding means, said rounding                      
               processing means not rounding the output value of said                 
               shifting operation means when the arithmetic instruction               
               is                                                                     
               indicative of a logical operation and rounding the output              
               value of said shifting operation means when the                        
               arithmetic instruction is indicative of an arithmetic                  
               operation.                                                             
          We further note that Appellant’s claim 6 recites                            
               rounding processing means, coupled to said shifting                    
               operation means, for rounding an output of said shifting               

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