Appeal No. 1999-1637
Application 08/417,537
is the control gate 1. It may be fairly characterized as being located laterally adjacent to
the floating gate 2.
The recitation of the floating gate overlying another gate is also recited in
independent claim 5 on appeal. However, this claim also requires specifically that that
gate be a select gate. Since Sugaya’s invention does not include a select transistor and
therefore a select gate for the dual memory cell arrangement in representative Figure 1,
the overall structure of claim 5 on appeal can not be met by Sugaya alone. Claim 18
cannot be met for similar reasons. This claim also recites a first and second transistor,
only one of which may be arguably met in any manner by the teachings and showings in
Sugaya’s Figure 1. Finally, independent claims 30 and 36 on appeal require the recitation
of a select gate which is not taught or suggested in any manner in Sugaya as discussed
earlier. Since we can not sustain any rejection of independent claims 1, 5, 18, 30 and 36
on the basis of Sugaya alone, the rejection of their respective dependent claims must also
be reversed.
In closing, we have sustained the rejection of claims 18, 30, 31, 34 and 35 under 35
U.S.C. § 102, while reversing the rejection of dependent claim 19 on this statutory basis.
We have also reversed the rejection of all claims on appeal under 35 U.S.C. § 103.
Therefore, the decision of the examiner is affirmed-in-part.
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