Appeal No. 2002-0727
Application No. 08/869,878
(c) means for determining if a copy of said data resides in
said cache memory;
(e) means for providing access to said copy of said data
residing in said cache memory if said copy of said data resides in
any region within said cache memory; and
(f) means for copying said data from said main memory into
the region of said cache memory associated with said one of said
processors if a copy of said data does not reside in any region
within said cache memory.
The References
In rejecting the claims under 35 U.S.C. § 103(a), the
examiner relies upon the following references:
Brenza 4,905,141 Feb. 27, 1990
Pierce et al. (Pierce) 5,584,017 Dec. 10, 1996
The Rejection
Claims 1-10 stand rejected under 35 U.S.C. § 103(a) as being
unpatentable over Brenza in view of Pierce.
The Invention
The invention relates to an apparatus and method for speeding
up the access to data housed in a computer by avoiding cross-
thrashing of data in a cache memory. (Specification, page 2,
lines 12-16 and 18-22). The cache region is divided into a
plurality of regions which can be accessed by any of a plurality
of processors desiring data. However, when data is not found
within the cache memory, each processor can only cause allocation
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