Ex Parte UENO et al - Page 2




          Appeal No. 2003-2107                                                        
          Application No. 09/429,283                                                  


               14. A method of manufacturing a semiconductor device in                
          which there are first and second types of transistors formed on a           
          single semiconductor substrate, comprising the steps of:                    
               (a) selectively forming a field oxide film on a main surface           
          of said semiconductor substrate to thereby define first and                 
          second regions in which said first and said second types of                 
          transistors are formed;                                                     
               (b) forming an oxide film on said first and said second                
          active regions; and                                                         
               (c) forming a control electrode of a polysilicon layer on              
          said first and said second regions,                                         
               wherein said step (c) includes the steps of:                           
               (c-1) introducing an impurity of the same conductivity as a            
          source/drain layer into said polysilicon layer within said first            
          active region at a relatively low dose n1; and                              
               (c-2) introducing said impurity into said polysilicon layer            
          within said second active region at a relatively high dose n2               
          while introducing nitrogen into a lower portion of said                     
          polysilicon layer within said second active region at a dose n3.            
               The prior art references of record relied upon by the                  
          examiner in rejecting the appealed claims are:                              
          Choi                          5,780,330             Jul. 14, 1998           
                                                      (filed Jun. 28, 1996)               
          Gardner et al. (Garner)       6,004,849             Dec. 21, 1999           
                                                      (filed Aug. 15, 1997)               
          Chishima                      JP 4-157766           May  29, 1992           
          (Japanese Kokai Patent)                                                     
          A. I. Chou et al. (Chou), "The Effects of Nitrogen Implant into             
          Gate Electrode on the Characteristics of Dual-Gate MOSFETs with             
          Ultra-thin Oxide and Oxynitrides," IEEE 174-77 (August 4, 1977)             
          S.M. Sze (Sze), VLSI Technology 493-94 (2d ed., McGraw-Hill 1988)           

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