Appeal No. 2004-0550
Application No. 09/802,201
(5) claims 16-19 stand rejected under section 103(a) over
the references as in rejection (1) further in view of Wu (Answer,
page 10); and
(6) claim 20 stands rejected under section 103(a) over the
references as in rejection (1) further in view of Boden (id.).
We affirm all of the examiner’s rejections on appeal
essentially for the reasons stated in the Answer and the reasons
set forth below.
OPINION
The examiner finds that Rajkanan discloses a method of
forming a capacitor 100" on a substrate 102, including the
formation of a pair of shallow n-type tip implants in an n-type
silicon region, an n-type drain region 112-2 and an n-type source
region 112-1 in an n-type silicon region 104-1, a dielectric
layer 108 formed on said n-type silicon region, and a polysilicon
gate 110-1 formed on said dielectric layer (Answer, pages 4-5,
citing Figures 4a-6). The examiner finds that Rajkanan is silent
as to whether the polysilicon gate is doped p- or n-type (Answer,
page 5).
The examiner finds that Lee teaches forming a polysilicon
gate with p+ polysilicon material, where the polysilicon gate is
5
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