Appeal No. 2006-2407
Application No. 09/802,857
time sequence signals to be switched by switch 23 to the data bus 5 which feeds
directly to the CPU 2 in figure 3. Thus, in Sagane the duplicated structural
elements noted earlier would perform a sequential execution of a plurality of
debugging programs upon the respective coincidence signals detected by the plural
comparators by their issuance of the coincidence or matching signal A in figure 3.
If there is no coincidence, the program executes in a normal fashion as required at
the end of claim 13 on appeal.
Notwithstanding the arguments in the brief and reply brief urging the conflict
between the interrupt generation approach in figure 1 of Sagane and the absence of
this in figure 3, there is no requirement of independent claim 13 on appeal of any
interrupt being generated or required by the circuit elements claimed.
Notwithstanding this observation about the actual recitations in claim 13, within
35 U.S.C. § 103 it appears clear to us that the artisan would have recognized that
the circuitry in figure 3 functions in a manner consistent with the CPU receiving an
interrupt-type switching of the sequencing of the program as would be expected in
a normal interrupting environment. Because the CPU 2 in figure 3 of Sagane
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