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(4) Conduct analysis to determine valid
parameter ranges for follow-on simula-
tion effort, and attempt to define pro-
jected hardware implementations.
(5) Prepare an interim report of the find-
ings and recommendations.
Phase II:
(1) Adapt the open loop SSPG seeker labora-
tory experiment for interfacing with a
6-DOF flight dynamics computer code for
a hardware in the loop simulation.
(2) Design and construct a line of sight
(LOS) processor to extract guidance
information from the SSPG seeker output
signals.
(3) Modify and update the existing 6-DOF
flight dynamics code to include rapid
spin and nutation, and optimize the code
for interface with the line of sight
processor and other relevant laboratory
hardware.
(4) Assemble the hardware in the loop simu-
lation model using the above components,
debug and calibrate, and perform simula-
tion runs against simulated single and
multiple target and background images.
(5) Transfer the hardware and software of
the simulation effort to the KHILS fa-
cility, interface with the KHILS equip-
ment and conduct simulation against
typical strategic and theater missile
defense scenarios.
(6) Conduct a top level projectile design,
defining a basic configuration, essen-
tial parameters like mass, moments,
ballistic characteristics, and guidance
and control, for various potential ap-
plications.
(7) Prepare an interim report and material
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Last modified: May 25, 2011