Appeal No. 96-1584
Application 08/066,697
dielectrically isolated island, such as the fill material of a
trench isolated integrated circuit architecture, so as to prevent
the avalanche-generation of electron/hole pairs at a buried
layer/island junction, which would otherwise limit the breakdown
voltage of the device.
Claims 22 and 24 are illustrative and read as follows:
22. A semiconductor device comprising:
a semiconductor substrate containing a semiconductor island
region of a first conductivity type having sidewalls which abut a
first side of dielectric material that prescribes said island
region, a second side of said dielectric material being
contiguous with material capable of distributing a voltage
applied thereto;
a first semiconductor region of said first conductivity
type, and having an impurity concentration different from that of
said island region, disposed in said island region, so as to
define a relatively high-to-low impurity concentration junction
between said first semiconductor region and said island region,
said relatively high-to-low impurity concentration junction
corresponding to a readily measurable transition of doping
concentration within said island region, as opposed to a graded
profile from high-to-low doping such as a Gaussian distribution
from a top surface of said island region toward the bottom of
said island region or a low-to-high retrograde profile measured
from said top surface of said island region, said relatively
high-to-low impurity concentration junction intersecting said
dielectric material at a sidewall of said semiconductor island
region;
a second semiconductor region of a second conductivity type
disposed in said island region so as to define a PN junction
between said second semiconductor region and said island region,
said island region and said second semiconductor region being
coupled to receive respective bias voltages which reverse bias
said PN junction; and
2
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