Appeal No. 94-3053
Application 07/832,661
facilities within the microprocessor [under test]" (col. 4,
lines 6-7).
Hester performs this alter/control function by having a
“desired instruction" that is used "to enable the stop-on-
address function" of the microprocessor. Col. 3, lines 22-37;
col. 4, line 10. Thus, the claim language that Appellants
argue for claim 61 is met by Hester and since anticipation is
the epitome of obviousness, Fracalossi, 681 F.2d at 794, 215
USPQ at 571, we will sustain the Examiner’s rejection of claim
61 under 35 U.S.C. § 103 in view of Hester.
Aside from the above claim language for claim 61,
Appellants have chosen not to argue any of the other specific
limitations as a basis for patentability and this board
declines to look beyond that which has been argued by
Appellants. Baxter, 952 F.2d at 391, 21 USPQ2d at 1285; 37
CFR § 1.192.
30
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