Appeal No. 95-4815
Application No. 08/065,387
This means that something must receive the output from the
processor and that that output must be the “consecutive data
field,” as claimed. That something, as disclosed by
appellant, is an interface between the processor and the video
RAM as shown, for example, in instant Figure 9.
While the examiner is correct in asserting that
Diepstraten does discuss the use of contiguous addresses in
the video RAM at column 1, lines 41-61, there is no indication
therein that anything receives a consecutive data field from
the processor. If, in fact, the VRAM control 26 of
Diepstraten, as shown in Figure 1 of the patent and, in more
detail, in Figure 4, accepted a consecutive data field from
graphics processor 22 and then distributed this consecutive
data field to non-consecutive addresses in VRAM 30, then we
would agree that the rejection under 35 U.S.C. ' 103 would
have been proper. However, we find no indication in
Diepstraten, and the examiner has not pointed to anything
therein to convince us, that VRAM control 26 does, in fact,
accept a consecutive data field from processor 22 and
distribute it to non-consecutive addresses in VRAM 30. In
fact, it would appear that Diepstraten operates as contended
by appellant, at page 7 of the brief. That is,
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