Appeal No. 1996-2195
Application 08/120,911
Inc., 721 F.2d 1540, 1548, 220 USPQ 303, 309 (Fed. Cir. 1983),
cert. denied, 469 U.S. 851 (1984).
Appellants argue on page 11 of the brief that
Watkins' CPU can only use a central cache with respect to
either reading or writing data, but cannot use the I/O cache.
Appellants point out that Watkins' CPU uses the I/O cache only
for specific pur-poses including executing the flush cycle,
pointing to column 21, line 66, to column 22, line 14.
Appellants point out that the use of the central cache and the
I/O cache by the CPU results from the basic concept of
operation disclosed by Watkins wherein the I/O cache is used
for holding data which has been written from outside the
processor by each I/O device that is to be written into the
system memory.
Appellants argue that their invention operates
differently in that the processor of their invention has a
main cache and a receive cache wherein the instruction
processor uses
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