Appeal No. 1996-2195
Application 08/120,911
through 43. Watkins discloses in column 2, lines 29 through
39, that their invention solves this problem of maintaining
data consistency between an I/O cache and a CPU cache by a
unique combination of hardware and software supports called
collectively consistency controls. Watkins further lays out
data consistency requirements and operating system consistency
guidelines in column 4, line 40, through column 6, line 11.
These guidelines make it clear that the CPU is not allowed to
access the I/O cache.
Segers is not concerned with the problem of data
coherency for an I/O cache. Segers teaches a central
processing
unit (10) having a cache memory system (24). The cache memory
system (24) includes a primary cache (26) and a secondary
cache (28). Segers discloses that the primary cache (26) has
a faster access than the secondary cache (28). In column 2,
lines 1 through 35, Segers discloses that they are attempting
to solve the problem of the time it takes for a cache system
11
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