Appeal No. 1996-2369 Page 9
Application No. 08/191,723
display space but which when unregulated may result
in an undesired display within the display space,
said data regulating means causing the address data
of the second number of regulated bits to be within
an addressing range outside the display space based
on the address data provided by said second number
of regulated bits ....
Giving the claim its broadest reasonable interpretation, the
limitations recite a data regulating means for logically
combining address data with a predetermined number of extended
bits.
The examiner fails to show a teaching or suggestion of
this limitation in the prior art. He admits that the
appellants’ admitted prior art “does not expressly details
[sic] the first determined number of bits logically combined
with a predetermined numbers [sic] of extended bits ....”
(Examiner’s Answer at 5.) Nevertheless, the examiner
concludes that it would have been obvious to logically combine
”two predetermined number of bits ... because the address data
input are corrected as taught by Applicant’s [sic] admitted
prior art.” (Id.)
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