Ex parte INAMORI et al. - Page 10




          Appeal No. 1996-2369                                      Page 10           
          Application No. 08/191,723                                                  


               We note that the appellants’ admitted prior art merely                 
          teaches that “address data not within the scope of effective                
          address are discriminated ... so that no undesired display can              
          occur within the effective display space.”  (Spec. at 4.)                   
          Neither the use of extended bits nor the conversion of address              
          data is disclosed therein.  Consequently, the admitted prior                
          art neither teaches nor would have suggested the data                       
          regulating means as claimed.                                                


               Regarding claim 3, the appellants argue, “As to that                   
          which is allegedly disclosed by the admitted prior art, there               
          is clearly no disclosure of a loop count register means as                  
          claimed.”  (Appeal Br. at 18.)  They add, “Moreover, in the                 
          description of a block transfer such as a write loop beginning              
          with the last line at page 6 of the present disclosure, it is               
          believed to be abundantly clear that no loop count register                 
          means is included.”  (Id. at 18-19.)  The examiner replies,                 
          “Claim 3 simply requires a loop counter means for storing                   
          operation number data input from the control means.  This                   
          broadly reads on the result buffer (112) for storing the                    









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