Appeal No. 1996-2369 Page 12
Application No. 08/191,723
examiner reads the loop counter register of the claim on the
result buffer 112 of the appellants’ admitted prior art. The
result buffer, however, merely stores results of arithmetic
operations performed by the arithmetic circuit 111 of the
appellants’ admitted prior art. (Spec. at 7.) Consequently,
the result buffer neither teaches nor would have suggested a
loop count register means for storing a count of the number of
times a repeated logical operation is to be sequentially done
by a column drive means.
Regarding claim 8, the appellants argue, “At best, the
portion bridging pages 3 and 4 of the present specification
merely indicate that bad or incorrect addresses are detected
and ignored or not used as opposed to being converted to an
address by a hardware conversion means in the particular
manner specified in the claim.” (Appeal Br. at 14.) The
examiner replies, “The term ‘discriminate’ does not imply that
the address data must be destroyed or not be used as argued by
Appellant." (Examiner’s Answer at 10.) We agree with the
appellants.
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