Appeal No. 1997-2983 Page 11
Application No. 08/482,792
third bus for connecting said CPU with said RAM, said third
bus being used only for passing data respectively held in said
Program Counter Register, said Processor Status Word Register,
and said General Purpose Register Set between said CPU and
said RAM, ... a fourth bus for connecting said CPU with said
RAM and passing address data corresponding to said data passed
through said third bus"; and "a) executing a first program
using said execution unit of said microcomputer, wherein said
execution of said first program uses a processor status word,
a program counter value and a register bank corresponding to
said first program; ... saving said processor status word,
said program counter value and data stored in said register
bank corresponding to said first program in a designated
location in said RAM via a dedicated data bus and a dedicated
address bus connecting said executing unit of said
microcomputer and said RAM; d) retrieving a processor status
word, a program counter value and data to be stored in a
register bank corresponding to said second program from
another location in said RAM via said dedicated data bus and
said dedicated address bus ...." The examiner fails to
establish a prima facie case of obviousness. Therefore, we
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