Ex parte TAGUCHI et al. - Page 3




          Appeal No. 1998-2987                                       Page 3           
          Application No. 08/250,332                                                  


          containing silicon is deposited on the metal layer by                       
          sputtering at a temperature no greater than 150°C so that                   
          silicon nodules are deposited at a boundary between the                     
          conductive layer and the underlying metal layer.  A rapid                   
          thermal annealing treatment is applied so that the silicon                  
          nodule are absorbed from the boundary layer into the                        
          intermediate layer to form an alloy of aluminum, silicon, and               
          a metal of the underlying layer between the conductive layer                
          and the underlying layer.                                                   


               Claim 22, which is representative for our purposes,                    
          follows:                                                                    
                    22. A method of forming wirings for                               
               semiconductor devices comprising the steps of:                         
                    providing a semiconductor substrate having a                      
               diffusion region contained therein;                                    
                    depositing an interlayer insulating layer on the                  
               semiconductor substrate;                                               
                    forming at least one contact hole by removing a                   
               portion of the interlayer insulating layer to expose                   
               a selected portion of a surface of the semiconductor                   
               substrate;                                                             
                    depositing an underlying metal layer over both                    
               the interlayer insulating layer and the exposed                        
               surface of the semiconductor substrate;                                







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