Appeal No. 1999-0259
Application 08/596,857
claim 10, Appellants argue that Komoda fails to teach a
similar limitation. “Again, at least the claim language
‘providing a first load for a first one of the plurality of
serially coupled circuit cells where the circuit cells include
active elements’ is not taught or suggested by Komoda.”
Brief at page 6. Finally, in Appel- lants’ discussion of
Claim 16, Appellants argue that Komoda does not "teach or
suggest modeling a bit cell memory array” where the bit cells
include active elements. Brief at page 7.
The Examiner responds that Komoda “substantially”
teaches all of the limitations of claim 1 and “. . . claims 10
and 16 are rejected based on the rejections of claim 1.”
Examiner’s Answer at page 4. However, although the Examiner
agrees that Komoda does not specify that circuit cells include
active elements, the Examiner rebuts that “[i]t would have
been obvious to a person of ordinary skill in the art . . .
[to] know [that] in a computer aided design and in . . . real
time processing[,] active elements are standard means of
design functions.” Examiner’s Answer at pages 4-5.
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