Ex parte YASUHO et al. - Page 7




          Appeal No. 1999-1454                                        Page 7           
          Application No. 08/596,343                                                   


          USPQ 929, 933 (Fed. Cir. 1984).  These showings by the                       
          examiner are an essential part of complying with the burden of               
          presenting a prima facie case of obviousness.  Note In re                    
          Oetiker, 977 F.2d 1443, 1445, 24 USPQ2d 1443, 1444 (Fed. Cir.                
          1992).  If that burden is met, the burden then shifts to the                 
          applicant to overcome the prima facie case with argument                     
          and/or evidence.  Obviousness is then determined on the basis                
          of the evidence as a whole.  See id.; In re Hedges, 783 F.2d                 
          1038, 1039, 228 USPQ 685, 686 (Fed. Cir. 1986); In re                        
          Piasecki, 745 F.2d 1468, 1472, 223 USPQ 785, 788 (Fed. Cir.                  
          1984); and In re Rinehart, 531 F.2d 1048, 1052, 189 USPQ 143,                
          147 (CCPA 1976).                                                             
               We consider first the rejection of claims 1-9 and 11-14                 
          under 35 U.S.C. § 103 based on the teachings of the admitted                 
          prior art taken together with Hosen and Lin.  We begin with                  
          claim 1.  The examiner’s position (answer, pages 3-4) is that                
          the prior art (specification, page 1) discloses a conventional               
          integrated circuit device wherein the component parts such as                
          the power supply, CPU chip, controllers and connector are all                
          mounted on a single, one-sided or two-sided multi-layer                      








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