Appeal No. 2000-1361 Page 11
Application No. 08/933,880
and the “analysis unit” (comparator block 520) sends an enable
signal to the “output register” (register 580) based on the value
of the output of the “input register” (registers 640 and 650).
We still see no disclosure in Richardson related to using the
value of the output of the input register to determine the time
at which an output value of the combinatorial block is present
for sending an enable signal to the output register.
Therefore, we find that the reference fails to teach all the
claimed requirements for sending an enable signal from the
analysis unit to the output register at a specific time and
cannot anticipate the claimed subject matter. Accordingly, since
the Examiner has failed to meet the burden of providing a prima
facie case of anticipation, the rejection of claims 1, 4 and 6
under 35 U.S.C. § 102 over Richardson cannot be sustained.
Regarding the rejection of claims 2, 3, 5, 7 and 8 under
35 U.S.C. § 103 over Richardson and Kontani, we note that Kontani
merely teaches detection of anomalous signals by using a digital
filter. However, the reference fails to provide any teachings or
suggestions for modifying Richardson to overcome the deficiencies
discussed above. Therefore, we do not sustain the rejection of
claims 2, 3, 5, 7 and 8 under 35 U.S.C. § 103 over Richardson and
Kontani.
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