Appeal No. 2002-0142
Application No. 09/248,957 Page 4
To anticipate a claim, a prior art reference must disclose every
limitation of the claimed invention, either explicitly or
inherently. In re Schreiber, 128 F.3d 1473, 1477, 44 USPQ2d
1429, 1431 (Fed. Cir. 1997). As stated in In re Oelrich, 666
F.2d 578, 581, 212 USPQ 323, 326 (CCPA 1981) (quoting Hansgirg v.
Kemmer, 102 F.2d 212, 214, 40 USPQ 665, 667 (CCPA 1939))
(internal citations omitted):
"Inherency, however, may not be established by probabilities
or possibilities. The mere fact that a certain thing may
result from a given set of circumstances is not sufficient.
If, however, the disclosure is sufficient to show that the
natural result flowing from the operation as taught would
result in the performance of the questioned function, it
seems to be well settled that the disclosure should be
regarded as sufficient."
We consider first the rejection of claim 1 based upon the
teachings of Sato. Appellants assert (brief, pages 8 and 9) that
Sato does not disclose that the signal Q and the signal Q have
equal delay times as required by claim 1. It is argued (id.)
that in appellants' invention, the output stage includes a pull-
up circuit and a pull-down circuit, and that the circuits are
symmetrical with respect to the first and second current paths,
resulting in equal delay times. Appellants direct our attention
to page 12 of appellants' specification which discloses that as a
result of the symmetrical design, the rising and falling edge
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