Appeal No. 2004-0633
Application No. 10/011,198
35. The system in claim 34, wherein said second
interconnect laterally contacts said first insulator.
36. The system in claim 35, wherein said second insulator
laterally contacts said plug, and wherein said second insulator
is over a part of said second interconnect.
37. A portion of a memory array, comprising at least one
integrated structure comprising a first interconnect within said
memory array and an electrical connector extending upward from
said interconnect.
38. A portion of a memory device comprising:
at least two portions of insulation defining:
a first opening within said memory device, defining:
a first plug site, and
a first interconnect site in communication with said first
plug site,
wherein said first plug site and said first interconnect
site are filled with a continuous amount of conductive material;
and
a second opening lateral to said first opening, said second
opening defining:
a second plug site filled with at least one portion of said
at least two portions of insulation, and
a second interconnect site in communication with said
second plug site, wherein said second interconnect site is
filled with said conductive material.
39. A level of interconnects for a memory device,
comprising:
a layer of insulation defining a plurality of trenches
within said memory device, wherein each trench of said plurality
defines a lower portion and an upper portion, and wherein:
said lower portion is filled with metal,
said metal extends up into at least one area of said upper
portion, and
said upper portion is filled with oxide except in said at
least one area.
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