Appeal 2006-1454
Application 09/004,524
Patent 5,483,421
thermal coefficient of expansion of the card (U.S. Patent 5,483,421,
col. 1, ll. 5-10).
2. Applicants state at column 1, lines 14-20, that:
The packaging of integrated circuit chips for use in computers or
similar devices involves the attachment of integrated circuit
semiconductor chips to printed circuit boards which printed circuit
boards in turn are mounted in various computers or other type devices.
The circuit boards have conductors formed thereon which provide the
various power, ground and I/O signal lines to the integrated circuit
chips.
3. Applicants further state at column 1, lines 21-29, that:
There have been many different prior art proposals for connecting
integrated circuit chips to printed circuit boards. The very large
difference in thermal coefficient of expansion (TCE) between the
silicon device, i.e. the chip, and the printed circuit board generally
requires some intermediate device carrier. One such type of
interconnection mounts the integrated circuit chip on a ceramic chip
carrier or module, which module in turn is mounted on a circuit board.
4. Applicants opine at column 1, line 61 through 2, line 4, that:
While this technique for connection of chips to boards is effective in
many instances, it does have several drawbacks and limitations. One
very serious drawback is the differential of the expansion of the
ceramic chip carrier on one hand and the glass reinforced plastic
printed circuit board on the other hand when the board and chip
carrier are heated. Because of this differential of expansion, stress is
created at the board/module interface, which can lead to material
failure. This becomes more critical for larger modules (e.g. high I/O
pin count). Another draw back to this type of mounting is the spacing
requirements for pin and hole.
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