Appeal 2006-1454
Application 09/004,524
Patent 5,483,421
5. Applicants state at column 2, lines 11-17, that:
One attempt to overcome these drawbacks is the so-called direct chip
attached to the circuit board. This does have many advantages.
However, in addition to the thermal mis-match, it does pose certain
problems, since the spacing of the interconnect pads on the chip are so
very close that they require very fine line patterns on the substrate to
which the chip is to be attached.
6. Applicants state at column 2, lines 50-54, that:
Other techniques for attachment of ceramic chip carriers to glass
reinforced epoxy circuit boards (FR-4) are shown in IBM Technical
Disclosure Bulletin Volume 18, Number 5, Pages 1440-1441 and IBM
Technical Disclosure Bulletin Volume 20, Number 8, Pages 3090-
3091.
7. Applicants further state at column 2, line 55 through
column 3, line 4, that:
In an attempt to overcome the problem of thermal mismatch between
the chip carrier and the circuit board it has been proposed to fashion
the chip carrier from a material similar to that of the circuit board.
Such techniques are described in IBM Technical Disclosure Bulletin
Volume 33, Number 2, Pages 15-16 and IBM Technical Disclosure
Bulletin Volume 10, Number 12, Pages 1977-1978. However, both of
these references require that the connections, at least for the signal I/O
lines, be on the same side of the carrier as that to which the chip is
mounted. . . . These techniques do solve the problem of thermal
mismatch between the chip carrier and the circuit board, but they
require peripheral I/O bonding and an additional interposer between
the chip and the chip carrier.
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