Appeal 2006-3123
Application 10/368,789
Representative claim 1 is illustrative:
1. A method for evaluating power and ground vias in an
electronic design, comprising the steps of:
formulating one or more via sufficiency rules;
processing the electronic design to determine whether the
power and ground vias of the electronic design violate
the via sufficiency rules; and
generating an indicator associated with the electronic design to
identify vias that violate the via sufficiency rules.
THE REFERENCE
The Examiner relies upon the following reference as evidence of
anticipation:
Yu US 6,829,754 B1 Dec. 7, 2004
(filed Jun. 4, 2002)
THE REJECTION
The following rejection is on appeal before us:
1. Claims 1-6, 8-10, 16, 17, and 19-21 stand rejected under
35 U.S.C. § 102(e) as being anticipated by Yu.
Rather than repeat the arguments of Appellants or the Examiner, we
make reference to the Briefs and the Answer for the respective details
thereof.
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