Appeal 2006-3123
Application 10/368,789
into the claims. In re Van Geuns, 988 F.2d 1181, 1184, 26 USPQ2d 1057,
1059 (Fed. Cir. 1993).
In the instant case, we find no basis for Appellants’ contention that Yu
cannot anticipate claim 1 because Yu does not disclose via checking for
layers of a package design (see Br. 11). In particular, we note that the step
of checking for layers of a package design is not recited in claim 1. With
respect to Appellants’ argument that Yu fails to disclose formulating one or
more via sufficiency rules, we note that Yu explicitly discloses via Rules
6.1, 6.2, 6.3, 6.4, and 6.5 that generate an error, e.g., (1) if the number of
vias is less than the minimum recommended, or (2), if the vias are
insufficient at a strap connection, or (3), if the vias are missing or not fully
populated (See Fig. 10). We find that Yu’s via sufficiency Rules 6.1, 6.2,
6.3, 6.4 and 6.5 are inherently formulated. Thus, we agree with the Examiner
that Yu fully discloses the recited limitations of independent claim 1.
Claim 2
Appellants note that claim 2 recites the step of “processing one or
more selected layers of the electronic design for violation of the via
sufficiency rules” (Br. 11). Appellants argue that Yu does not disclose or
suggest processing selected layers of the electronic design (id.). In
particular, Appellants argue that Yu does not disclose the selecting of layers
(id., emphasis added).
The Examiner disagrees. The Examiner notes that a via is a
connection between at least two or more layers. The Examiner asserts that
Yu’s power checker program processes one or more selected layers of the
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