Appeal 2007-2460
Application 10/709,179
Examiner found that Ono teaches a chip, a first interconnector, a through
hole, a second interconnector and a bump. Ono’s first interconnector is
attached to the backside of the chip, the through hole is located beneath the
first interconnector and connects to a second interconnector, which is also
beneath the first interconnector. Ono’s bump attaches directly to the second
interconnector. The Examiner found that a bump pad is understood by one
of ordinary skill in the art to be a structure that provides an electrical
connection between the bump and the semiconductor chip. The Examiner
concluded that Ono teaches a bump on a bump pad that is on the backside of
the chip as Ono’s first and second interconnectors and through holes provide
a structure that provides an electrical connection between Ono’s bumps and
Ono’s semiconductor chip.
We affirm the Examiner’s rejections.
ISSUE
The issue is whether Applicants have shown that the Examiner erred
in rejecting the claims. Specifically, the issue is:
Have Applicants demonstrated that the Examiner was
unreasonable in construing a bond pad to be a structure that
provides an electrical connection between a semiconductor chip
and a bump?
FINDINGS OF FACT
A. ASE’s ‘179 Specification and Claims
1) ASE’s claims are directed to a method of fabricating bumps on a
backside of a chip, comprising the steps of: [1] providing the chip with an
active surface having at least a bonding pad thereon and the backside;
4
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