Ex parte MATTISON - Page 2




          Appeal No. 95-2218                                                          
          Application 07/902,073                                                      
          claims 13 and 14 and enter a new ground of rejection for the                
          remaining claims.                                                           
               2.   Appellant filed the subject application on 22 June                
          1992.  He claims no priority under 35 U.S.C. §§ 119 or 120.                 
               3.   The subject matter of the invention is a delayed read             
          data single shot (DRDSS) circuit for delaying a data signal read            
          from different zones on a zone-bit-recorded (ZBR) data storage              
          device.  (Paper 1 at 1.)                                                    
               4.   Claim 12, the only independent claim on appeal, sets              
          forth the subject matter of the invention as follows:                       
                    Window margining apparatus for detecting the                      
               occurrence of a data pulse reproduced from a zone bit                  
               recorded data storage device within a window duration,                 
               comprising:                                                            
                    a delayed read data single shot (DRDSS) circuit                   
               for delaying by an adjustable amount the data pulse                    
               reproduced from said data storage device to produce a                  
               DRDSS-delayed data pulse, the amount of delay being                    
               determined by the zone from which said data pulse is                   
               reproduced;                                                            
                    variable delay means coupled in common with said                  
               DRDSS circuit for delaying said data pulse reproduced                  
               from said data storage device;                                         
                    window pulse generating means coupled to said                     
               DRDSS circuit for generating a window pulse of                         
               predetermined duration in response to the DRDSS-delayed                
               data pulse; and                                                        
                    detecting means coupled to said window pulse                      
               generating means and to said variable delay means for                  
               detecting if the data pulse delayed by said variable                   
               delay means occurs within said window pulse.                           
               5.   According to the disclosure, "the delay circuit . . .             
          has been described by those of ordinary skill in the art as a               

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