Appeal No. 95-2440
Application 07/705,726
Werner et al. (appellants) appeal from the final
rejection of claims 46 through 50, 52, 57 through 61, 63 and
72 through 98. Claim 70 stands withdrawn from further
consideration as directed to a non-elected invention.
Claims 46, 77, 87 and 97 are representative of the
subject matter on appeal and read as follows:
46. A method for fabricating an integrated circuit
monolith that is substantially monocrystalline and having
parts that are substantially lattice-matched, said monolith
being three-dimensional in the sense that it comprises two or
more layers of circuitry, said method combining at least the
following technologies:
a. sputter deposition of a type-1 semiconductor material
by using a type-1 semiconductor target;
b. sputter deposition of a small amount of heavily doped
type-2 semiconductor material by using a type-2 semiconductor
target;
c. diffusion in selected areas of the type-2 impurity by
using incident patterned light;
d. removal of type-2 impurity from nonselected areas by
ion milling; and,
e. rapid annealing by using general incident light.
77. Method for fabricating a three-dimensional integrated
circuit that is substantially monocrystalline and that
comprises a three-dimensaional doping pattern achieved by the
growth of a sequence of discrete crystal-layer increments,
each increment having a two-dimensional doping pattern, said
sequence of crystal-layer increments created in a manner such
that their successive two-dimensional patterns intersect where
2
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