Appeal No. 95-2440
Application 07/705,726
87. Method for fabricating a three-dimensional
integrated circuit that is substantially monocrystalline and
that comprises a three-dimensional doping pattern achieved by
the growth of a sequence of discrete crystal-layer increments,
each increment having a two-dimensional doping pattern created
by a procedure that comprises at least three of the following
five steps:
a. growth by sputter epitaxy of a lightly doped first
layer of semiconductor material of a first conductivity type;
b. growth by sputter epitaxy of a heavily doped second
layer, thinner than said first layer, of the same
semiconductor material and of a second conductivity type;
c. localized diffusion in selected areas of the
impurities present in the said second layer into the said
first layer by causing patterned light of appreciable
intensity to fall on the surface of the said second layer;
d. uniform removal by ion milling of the said second
layer, thus removing from nonselected areas essentially all of
the impurities associated with the said second layer of a
second conductivity type, while leaving these said impurities
distributed through the thickness of the said first layer in
the said selected areas;
e. thermal annealing of the grown crystal-layer increment
by using unpatterned incident light.
97. Method for fabricating a three-dimensional
integrated circuit that is substantially monocrystalline and
that comprises a three-dimensional doping pattern achieved by
the growth of a sequence of discrete crystal-layer increments,
each increment having a two-dimensional doping pattern created
by a procedure that comprises at least four of the following
five steps:
a. growth by sputter epitaxy of a lightly doped first
layer of semiconductor material of a first conductivity type;
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