Appeal No. 95-4714
Application No. 08/046,476
comparison results in a preselected relationship; and
a memory management unit coupled to said cache
data array for reassigning virtual addresses to said
plurality of cache blocks after said cache block flush
operation is complete.
The examiner relies on the following references:
Freeman et al. (Freeman) 4,677,546 Jun. 30, 1987
Stiffler et al. (Stiffler) 4,819,154 Apr. 4, 1989
Claims 13 and 14 stand rejected under § 103 as unpatentable
over Stiffler, while claims 17-27 stand rejected under § 103 as
unpatentable over Stiffler in view of Freeman.
New § 112 Rejections Entered Pursuant to 37 C.F.R. § 1.196(b)
For the following reasons, claims 13 and 14 are hereby
rejected under 35 U.S.C. § 112, second paragraph, for being
indefinite, i.e., for failing to particularly point out and
distinctly claim what appellants regard as their invention. In
addition, these claims are rejected under the written description
requirement of the first paragraph of § 112 as containing new
matter. Both of these new grounds of rejection are based on the
paragraph in claim 13 that begins "a plurality of cache flush
control means." Before considering that paragraph, we will read
the other claim recitations onto appellants' specification and
drawings.
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